High temperature superconductor (HTS) materials provide a means for carrying extremely large amounts of current with extremely low loss. HTS materials lose all resistance to the flow of direct electrical current and nearly all resistance to the flow of alternating current when cooled below a critical temperature. The development of HTS wires (the expression “wires” is used here for a variety of conductors, including tape-like conductors) using these materials promises a new generation of high efficiency, compact, and environmentally friendly electrical equipment, which has the potential to revolutionize electric power grids, transportation, materials processing, and other industries. However, a commercially viable product has stringent engineering requirements, which has complicated the implementation of the technology in commercial applications.
In the second generation HTS wire (coated conductor) technology, currently under development, the HTS material is generally a polycrystalline rare-earth/alkaline-earth/copper oxide, e.g. yttrium-barium-copper oxide (YBCO). The current carrying capability of the HTS material is strongly related to its crystalline alignment or texture. Grain boundaries formed by the misalignment of neighboring crystalline superconductor grains are known to form an obstacle to superconducting current flow, but this obstacle decreases with the increasing degree of alignment or texture. Therefore to make the material into a commercially viable product, e.g. an HTS wire, the superconducting material must maintain a high degree of crystalline alignment or texture over relatively long distances. Otherwise, the superconducting current carrying capacity (critical current density) will be limited.
A schematic of a typical second-generation HTS wire 100 is shown in FIG. 1. The wire includes substrate 110, buffer layer 120 (which could include multiple buffer layers), superconductor layer 130, and cap layer 140, and is fabricated as described below. It should be noted that in this and all subsequent figures, the dimensions are not to scale. Superconductor materials can be fabricated with a high degree of crystallographic alignment or texture over large areas by growing a thin layer 130 of the material epitaxially on top of a flexible tape-shaped substrate 110 and buffer layer 120, which are fabricated so that the surface of the topmost layer has a high degree of crystallographic texture at its surface. When the crystalline superconductor material is grown epitaxially on this surface, its crystal alignment grows to match the texture of the substrate. In other words, the substrate texture provides a template for the epitaxial growth of the crystalline superconductor material. Further, the substrate provides structural integrity to the superconductor layer.
Substrate 110 and/or buffer 120 can be textured to provide a template that yields an epitaxial superconductor layer 130 with excellent superconducting properties such as high critical current density. Materials such as nickel, copper, silver, iron, silver alloys, nickel alloys, iron alloys, stainless steel alloys, and copper alloys can be used, among others, in the substrate. Substrate 110 can be textured using a deformation process, such as one involving rolling and recrystallization annealing the substrate. An example of such a process is the rolling-assisted biaxially textured substrate (RABiTS) process. In this case large quantities of metal can be processed economically by deformation processing and annealing and can achieve a high degree of texture.
One or more buffer layers 120 can be deposited or grown on the surface of substrate 110 with suitable crystallographic template on which to grow the superconductor layer 130. Buffer layers 120 also can provide the additional benefit of preventing diffusion over time of atoms from the substrate 110 into the crystalline lattice of the superconductor material 130 or of oxygen into the substrate material. This diffusion, or “poisoning,” can disrupt the crystalline alignment and thereby degrade the electrical properties of the superconductor material. Buffer layers 120 also can provide enhanced adhesion between the substrate 110 and the superconductor layer 130. Moreover, the buffer layer(s) 120 can have a coefficient of thermal expansion that is well matched to that of the superconductor material. For implementation of the technology in commercial applications, where the wire may be subjected to stress, this feature is desirable because it can help prevent delamination of the superconductor layer from the substrate.
Alternatively, a non-textured substrate 110 such as Hastelloy can be used, and textured buffer layer 120 deposited by means such as the ion-beam-assisted deposition (IBAD) or inclined substrate deposition (ISD). Additional buffer layers 120 may be optionally deposited epitaxially on the IBAD or ISD layer to provide the final template for epitaxial deposition of an HTS layer 130.
By using a suitable combination of a substrate 110 and one or more buffer layers 120 as a template, superconductor layer 130 can be grown epitaxially with excellent crystal alignment or texture, also having good adhesion to the template surface, and with a sufficient barrier to poisoning by atoms from the substrate. The superconductor layer 130 can be deposited by any of a variety of methods, including the metal-organic deposition (MOD) process, metal-organic chemical vapor deposition (MOCVD), pulsed laser deposition (PLD), thermal or e-beam evaporation, or other appropriate methods. Lastly, a cap layer 140 can be added to the multilayer assembly, which helps prevent contamination of the superconductor layer from above. The cap layer 140 can be, e.g., silver or a silver-gold alloy, and can be deposited onto the superconductor layer 130 by, e.g., sputtering. In the case where slitting is performed after lamination, the cap layer may also include an additional laminated metal “stabilizer” layer, such as a copper or stainless steel layer, bonded to the cap layer, e.g., by soldering.
An exemplary as-fabricated multilayer HTS wire 100 includes a biaxially textured substrate 110 of nickel with 5% tungsten alloy; sequentially deposited epitaxial buffer layers 120 of Y2O3, YSZ, and CeO2; epitaxial layer 130 of YBCO; and a cap layer 140 of Ag. Exemplary thicknesses of these layers are: a substrate of about 25-75 microns, buffer layers of about 75 nm each, a YBCO layer of about 1 micron, and a cap layer of about 1-3 microns. HTS wires 100 as long as 100 m have been manufactured thus far using techniques such as those described above.
HTS wires with relatively large widths, such as 4 cm, 10 cm, or more, can be produced by this method. The wires can then be slit along their length into numerous smaller wires (e.g., 25 strips of 0.4 cm wires). This can reduce manufacturing costs, because a particular step, such as the fabrication of a superconductor layer, will need to be performed only once to produce multiple wires. However, the slitting process can damage one or more of the relatively brittle oxide layers, i.e., the buffer and/or superconductor layers, within the wire. Slitting can cause cracks in the oxide layer, which have some probability of spreading into the wire and causing a defect. Additionally, mechanical slitting machines can wear out with time and use, requiring maintenance such as the periodic replacement of blades. This wear and replacement introduces variables into the manufacturing process, and requires development of new inspections and metrics in order to ensure the consistency and quality of the resulting wires.
One issue for coated conductor HTS wires is that of environmental contamination when the wire is in use. Environmental exposure can slowly degrade the electrical performance of superconductor layers. Also, in the presence of cryogenic liquids such as liquid nitrogen in contact with the wire, the liquid can diffuse into pores within the wire, and on warming can form “balloons” that can damage the wire. Sealing the wire is desirable to prevent either environmental exposure of the HTS layers or penetration of the liquid cryogen into the wire. Seals for HTS assemblies are described in, e.g. U.S. Pat. No. 6,444,917.
During use, it is desirable that the HTS wire is able to tolerate bend strains. A bend induces tensile strain on the convex outer surface of the bend, and compressive strain on the concave inner surface of the bend, thereby subjecting the HTS layer to tensile or compressive strains depending on the direction in which the wire is bent. While a modest amount of compressive stress can actually enhance the current carrying capacity of a superconductor layer, in general subjecting the whole assembly to stress (especially repeated stress) places the wire at risk of mechanical damage. For example, cracks could form and propagate in the superconductor layer, degrading its mechanical and electrical properties, or the different layers could delaminate from each other or from the substrate. Methods for reducing stress in the superconductor layer are described, e.g., in U.S. Pat. No. 6,745,059 and U.S. Pat. No. 6,828,507. For example, a copper strip, chosen to have similar thickness and mechanical features to the substrate, can be bonded onto the upper surface of the insert. This sandwiches the superconductor layer roughly in the middle of the overall structure, so if the assembly is bent, the superconductor layer is neither at the outer nor inner surface of the bend.